Master-Slave Flip Flop Circuit and Its Working

The combinational circuits don’t utilize any kind of memory. Therefore, the earlier position of input does not include any result over the present situation of the circuit. Although, the sequential circuit includes memory consequently output depends on input which means output can change based on input. The working of these circuits can be done by utilizing previous circuit input, CLK, memory, and output. This article discusses an overview of the master-slave flip flop. But before going to know about this flip-flop, one has to know about the basics of flip-flops like SR flip flop and JK flip flop.

What is a Master-Slave Flip Flop?

Basically, this type of flip flop can be designed with two JK FFs by connecting in series. One of these FFs, one FF works as the master as well as other FF works as a slave. The connection of these FFs can be done like this, the master FF output can be connected to the inputs of the slave FF. Here slave FF’s outputs can be connected to the inputs of the master FF.

In this type of FF, an inverter is also used addition to two FFs. The inverter connection can be done in such a way that where the inverted CLK pulse can be connected to the slave FF. In other terms, if CLK pulse is 0 for a master FF, then CLK pulse will be 1 for a slave FF. Similarly, when CLK pulse is 1 for master FF, then CLK pulse will be 0 for slave FF.

master-slave-flip-flop-circuit
master-slave-flip-flop-circuit

Master-Slave FF Working

Whenever the CLK pulse goes to high which means 1, then the slave can be separated; the inputs like J & K may change the condition of the system.

The slave FF can be is detached until the CLK pulse goes to low which means to 0. Whenever the CLK pulse goes back to low-state, then the data can be transmitted from the master FF to the slave FF and finally, the o/p can be obtained.

At first, the master FF will be triggered at a positive level whereas the slave FF will be triggered at a negative level. Due to this reason, the master FF responds first.

If J=0 & K=1, then the output of the master FF ‘Q’ goes to the input K of the slave FF & the CLK forces the slave FF to RST (reset), therefore the slave FF copies the master FF.

If J=1 & K=0, then the of the master FF ‘Q’ goes to the input J of the slave FF & the CLK’s negative transition sets the slave FF, and copies the master.

If J=1 & K=1, then it toggles over the CLK’s positive transition & therefore the slave toggles over the CLK’s negative transition.

If both the J & K are 0, then the FF can be immobilized & Q remains unmovable.

Timing Diagram

  • When both the CLK pulse & o/p of the master is high, then it remains high until the CLK is low due to the state is stored.
  • At the present, the master’s o/p turn into low as the CLK pulse turn into high once more & remains become low till the CLK turn into high once more.
  • Therefore toggling takes place for a CLK cycle.
timing-diagram-of-a-master-slave-FF
timing-diagram-of-a-master-slave-FF
  • Whenever the CLK pulse is 1, the master is set however not the slave, therefore, the slave o/p remains ‘0’ till the CLK remains 1.
  • When the CLK is low, then the slave turns into operational & remains ‘1’ until the CLK again turn into ‘0’.
  • Toggling takes place throughout the entire procedure while the o/p is altering one time within a cycle.
  • This makes this flip flop as a synchronous apparatus because it passes only data with the CLK signal timing.

Thus, this is all about Master-Slave Flip Flop. From the above information, finally, we can conclude that this FF can be built with two FFs namely master and slave. When one FF acts like the master circuit, it activates over the leading edge of the CLK pulse. Similarly, when another FF acts like the slave circuit, then it activates over the falling edge of the CLK pulse.

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