Carry Save Adder : Circuit, Algorithm, Working, differences && Its Applications

In arithmetic & computer circuits, adders play an important role that can be utilized within the signaling methodologies. Adders are normally found in many building blocks of digital signal processing & microprocessor chips. There are different types of adders available like carry skip adder, CLA adder, RCA or ripple carry adder, and many more but, the carry save adder is a high-speed and low-cost adder with less latency. In array processing, division & multiplication, multi-operand addition is frequently encountered. To add many numbers in place of two together, several powerful adders are necessary. A carry-save adder or CSA is a high-speed multi-operand type adder and this adder is perfect for adding numerous operands together. As a result, it avoids speed-up computation & time-consuming carry propagation. This article discusses an overview of a carry save adder or CSA.

What is Carry Save Adder?

A carry-save adder or CSA is a type of digital adder mainly used for computing the sum of a minimum of three or above binary numbers very efficiently. A CSA is normally used within a binary multiplier because this multiplier involves the addition of the above two binary numbers after multiplication. By using this method, a big adder can be implemented which is very faster compared to the usual addition of numbers.

Carry Save Adder Block Diagram

The Carry Save adder circuit diagram is shown below. This type of adder is very different as compared to other types because it doesn’t transmit the middle carries toward the next stages, but in its place, it saves the carry & addends to the sum of the next stage with another fuller adder (FA).

The technique of adding up binary bits, the first stage of the addition part mainly includes saving the carries & sum bits, and transfers to the second stage. This stage acts related to ripple carry adder or RCA where the stored carry & sum bits are added. The operands used in this adder are three like X, Y & Z where ‘Z’ is a four-bit input carry. Here, for four every bit of X, Y & Z, and 4 FAs is used.

For every FA, the sum & carry bits are produced. Here, the carry bits are not transmitted to the next FA, but in its place, they are simply saved & added up to the next sum term with a ripple carry adder.

Carry Save Adder Algorithm

Carry save adder is mainly used for computing the sum of a minimum of three or above n-bit binary numbers. This type of adder is similar to a full adder. The following figure shows the sum of two 32-bit binary numbers, so 32 FAs are used in the first stage.

The Carry save unit includes 32 FAs where each adder calculates a single sum & carry bit depending on the equivalent two input number bits only. Assume that two 32-bit numbers like X & Y generate partial sum ‘S’ and & carry ‘C’ shown in the example below.

Si = Xi xor Yi

Ci = Xi and Yi

After that, the final addition can be computed like the following.

• Carry sequence ‘C’ can be shifted left by a single position.
• Place a zero on the front MSB of the partial sum sequence ‘S’.
• Finally, a ripple carry adder or RCA is used to add these two & generate the resulting sum.

Carry Save Adder Working

The carry save adder works by assembling K FAs without any horizontal connection. The main function of this adder is to add three k-bit integers like X, Y & Z to generate two integers sum ‘S’ & carry C. The carry propagator is propagated to the next level whereas the carry generator is used to generate the output carry, irrespective of the input carry. The carry propagation and generation are two functions in the carry save adder. The carry propagation (Cp) is propagated to the next level whereas the carry generator (Cg) is used to generate the output carry, irrespective of input carry.

For Example :

let X = 19, Y = 25 & Z = 11, then we compute the sum and carry it as S & C’ shown below.

X=19 = 1 0 0 1 1
Y=25 = 1 1 0 0 1
Z=11 = 0 1 0 1 1
……………………………………….
Sum = 1 0 0 0 0 1
Carry = 1 1 0 1 1
……………………………………….
55 = 1 1 0 1 1 1

In the above CSA example, when we are adding three binary numbers X, Y & Z you will get a sum and carry in the next state. After adding the sum and carry values, we will get the final value.

Carry Save Adder VHDL Code

Carry save adder or CSA performs three-bit addition at once. Here three bits are A, B & C which are processed and changed into a two-bit output like sum and carry denoted with ‘S’ & ‘C’. The carry in the first stage result is not propagated throughout the addition process. To produce carry, a ripple carry adder is implemented in the second stage for carry propagation. The VHDL code for the CSA can be constructed by simply mapping the VHDL code of the full adder to a two-stage adder circuit.

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity carry_save_adder is
Port ( A : in STD_LOGIC_VECTOR (3 downto 0);
B : in STD_LOGIC_VECTOR (3 downto 0);
C : in STD_LOGIC_VECTOR (3 downto 0);
S : OUT STD_LOGIC_VECTOR (4 downto 0);
Cout : OUT STD_LOGIC);
end carry_save_adder;
architecture Behavioral of carry_save_adder is
component full_adder_vhdl_code
Port ( A : in STD_LOGIC;
B : in STD_LOGIC;
Cin : in STD_LOGIC;
S : out STD_LOGIC;
Cout : out STD_LOGIC);
end component;
— Intermediate signal
signal X,Y: STD_LOGIC_VECTOR(3 downto 0);
signal C1,C2,C3: STD_LOGIC;
begin
— Carry save adder block
FA1: full_adder_vhdl_code PORT MAP(A(0),B(0),C(0),S(0),X(0));
FA2: full_adder_vhdl_code PORT MAP(A(1),B(1),C(1),Y(0),X(1));
FA3: full_adder_vhdl_code PORT MAP(A(2),B(2),C(2),Y(1),X(2));
FA4: full_adder_vhdl_code PORT MAP(A(3),B(3),C(3),Y(2),X(3));
— Ripple carry adder block
FA5: full_adder_vhdl_code PORT MAP(X(0),Y(0),’0′,S(1),C1);
FA6: full_adder_vhdl_code PORT MAP(X(1),Y(1),C1,S(2),C2);
FA7: full_adder_vhdl_code PORT MAP(X(2),Y(2),C2,S(3),C3);
FA8: full_adder_vhdl_code PORT MAP(X(3),’0′,C3,S(4),Cout);
end Behavioral;

Advantages & Disadvantages

The advantages of carry save adder include the following.

• The carry save adder decreases the addition of 3 numbers to 2 numbers.
• It consumes low power as compared to other types of adders due to few carry propagation stages.
• This adder performs three-bit addition at once.
• It is a high-speed multi-quantity adder
• In this type of adder, three different numbers can be operated at a time.
• The carry in this adder cannot be propagated throughout the stages. As an alternative, carry can be stored within the current stage & updated like added value within the next stage.
• The delay is zero for the tree CSA.
• A simple N-bit RCA is used for the next level wherever the final operation is done.

The disadvantages of carry save adder include the following.

• At every step of a carry-save addition, the addition result can be known immediately but we don’t know whether the addition result is smaller or larger as compared to a given number.
• This type of adder does not solve the problem of adding 2 integers to generate a single output. In its place, it simply adds 3 integers & generates two, so the sum of two integers is equivalent to the three inputs sum. This technique may not be appropriate for an application that requires only the normal addition.
• The detection of signs is not easy.
• It is very efficient only for high-bit operations.
• It has high power consumption & propagation delay for few-bit operations.

Applications

The applications of carry save adder include the following.

• The carry-save adder is used to calculate the partial products within integer multiplication.
• It is a type of digital adder, used to calculate the sum of a minimum of three or more binary numbers efficiently.
• These are commonly used in high-speed multipliers, wherever they normally function more quickly as compared to ripple carry or carry propagate adders.
• These are very helpful in situations wherever we require to add the above two numbers.
• These are used to build larger multipliers.
• These are used efficiently to implement a multi-operand adder without enhancing the hardware utilized significantly.

Difference between Carry Look A Head, Carry Save Adder, and Carry Select Adder?

Among the three types of adders, the Carry Look-Ahead Adder (CLA) is generally the fastest in terms of propagation delay and speed. Let’s briefly compare these adder types:

• Carry Look-Ahead Adder (CLA):
  • The Carry Look-Ahead Adder is designed to minimize the carry propagation delay by generating the carry signals for each bit position in advance.
  • It uses a set of logic equations to compute the carry signals independently of the inputs.
  • CLAs are highly parallel and can process multiple bits simultaneously, leading to faster addition operations.
  • The main drawback is that CLAs require more complex hardware compared to ripple-carry or carry-select adders.
• Carry Select Adder (CSA):
  • The Carry Select Adder optimizes carry propagation by using multiple sets of adders with different carry-in values and selecting the appropriate result based on the carry signal.
  • CSA performs parallel additions for both carry and no-carry cases, which can speed up the addition process.
  • However, CSA involves additional multiplexers and logic, which increases hardware complexity.
• Carry Save Adder (CSA):
  • The Carry Save Adder is often used in applications where the sum of multiple numbers needs to be computed.
  • It stores partial results and carries them separately and then performs final addition.
  • While it’s efficient for certain multi-operand addition tasks, it’s not typically used for simple two-input addition operations.

If we look for the fastest adder for simple two-input binary addition, the Carry Look-Ahead Adder is generally the best choice. However, the choice between these adder types often depends on the specific requirements of the application, such as trade-offs between speed, hardware complexity, and power consumption. For more complex scenarios involving multiple operands or specific design constraints, other types of adders like Carry Save Adders might also be considered.

Why CLA is faster Than RCA?

Carry look a head adder or CLA is very faster as compared to ripple carry adder because CLA utilizes Propagate & Generate signals. A CLA decreases the propagation delay by introducing very complex hardware.

Why Carry Look A Head Adder Is Faster?

A carry-look-ahead adder enhances speed by decreasing the required amount of time to decide to carry bits.

Thus, this is an overview of carry save adder, circuit, working, advantages, disadvantages & its applications. Here is a question for you, what is carry select adder?