What is 4×4 Array Multiplier and Its Working

Multipliers are used in a wide range of digital signal processing and other applications. Due to advancements in current technologies, many researchers have mainly concentrated on the design factors, for better performance. Some of the design targets are – high speed, accuracy, low power consumption, the regularity of layout, less area.DSP processor has various computational blocks, like multiplexers, adders, MAC. The speed of operation and execution of these blocks have advanced when compared to previous versions. The execution speed of multipliers depends on two factors, semiconductor technology, and multiplier architecture. Adders are the basic building block of digital multiplexers, where we perform a series of repeated additions, to speed up the multiplier operation, the adder’s operation speed has to be increased. There are many digital signal processing applications, where critical delay path and the performance of the processor lies in the multiplier. There are different types of multipliers among which 4×4  array multiplier is an advanced one which is described in this article.

Multiplication Schemes in 4×4 Array Multiplier

There are two types of multiplication schemes they are

Serial Multiplication (Shift–Add): The serial multiplication operation can be solved by finding partial products and then adding partial products together. The implementations are primitive with simple architecture

Parallel Multiplication: The parallel products are generated simultaneously in parallel multiplication and a high – performance machine Parallel implementations are applied, latency is minimized.

Multiplication Algorithm

Multiplication process has three main steps:

  • Partial product generation
  • Partial product reduction
  • Final addition.

The common multiplication method is the “add and shift “algorithm. The multiplication algorithm for an N-bit multiplier is shown below.

4-by-4-multiplication
4-by-4-multiplication

 

4 - by - 4 - multiplication 1
4 – by – 4 – multiplication 1
example-2
example-2

Partial Products are generated using AND gates, where

  • Multiplicand = N-bits
  • Multiplier = M-bits
  • partial products = N*M.

The multiplication of two 8-bit numbers, which generates the 16-bit product.

The equation of addition is

P ( m + n ) = A( m ) . B ( n ) = i=0 m-1∑ j=0n-1∑ ai bj 2i+j ……. 1

A, B = 8 bits;

Steps in Multiplication

The following are the steps for any multiplication

  • If LSB of Multiplier is ‘1’. then add the multiplicand into an accumulator multiplier bit is shifted one bit to the right and multiplicand bit is shifted one bit to the left.
  • Stop when all bits of the multiplier is zero.
  • Less hardware is used if partial products are added serially. We can add all PP by a parallel multiplier. However, it is possible to use compression technique the number of partial products can be reduced before addition, is performed.

Different Types of Multipliers

The different types of multipliers are,

Booth Multiplier

The function of the booth’s multiplier is, to multiply 2 signed binary numbers which are represented in 2’s complement form. The advantages of booths multipliers are Minimum complex, Multiplication is speeded up. The disadvantages of booths multipliers are Power consumption is high.

Combinational Multiplier

The combinational multiplier performs multiplication of two unsigned binary numbers. The advantage of a combinational multiplier is that it can easily generate intermediate products. The main disadvantage of the combinational multiplier is it occupies large areas.

Sequential Multiplier

Multiplication is divided into the sequence of steps, where the partial product generated is added to the accumulator partial sum now is shifted to the next step. The advantage of this is it occupies less area. The disadvantage os a sequential multiplier is it is a slow process.

Wallace tree Multiplier

It reduces the number of partial products and uses carry select adder for the addition of partial products. The advantage of the Wallace tree multiplier is a high speed and medium complex design. The main disadvantage of Wallace tree multiplier is the layout design is irregular and occupies a larger area.

Array Multiplier

The multiplier circuit is based on the add shift algorithm. The main advantage of the array multiplier is it’s simple in design and regular in shape. The disadvantage of an array multiplier is the delay is high and high power consumption.

Shift and Add Multiplier

It is similar to the normal multiplication process, which we do in mathematics, from array multiplier flow chat where X = Multiplicand; Y = Multiplier; A = Accumulator, Q = Quotient. Firstly Q is checked if it’s 1 or no if it is 1 then add A and B and shift A_Q arithmetic right, else if it is not 1 directly shift A_Q arithmetic right and decrement N by 1, in the next step check if N is 0 or no. If N not 0 repeats from Q=0 step else terminate the process.

shift-and-add-multiplier
shift-and-add-multiplier

Construction and Working of a 4×4 Array Multiplier

The design structure of the array Multiplier is regular, it is based on the add shift algorithm principle.

Partial product = the multiplicand * multiplier bit……….(2)

where AND gates are used for the product, the summation is done using Full Adders and Half Adders where the partial product is shifted according to their bit orders. In an n*n array multiplier, n*n AND gates compute the partial products and the addition of partial products can be performed by using n* (n – 2) Full adders and n Half adders. The 4×4 array multiplier shown has 8 inputs and 8 outputs

4-by-4-array-multiplier
4-by-4-array-multiplier

Building Blocks of 4×4 Array Multiplier

A full adder has three input lines and two output lines, where we use this as a basic building block of an array multiplier. The following is the example of a 4×4 array multiplier. The leftmost bit is the LSB bit of partial product.

adder-block-diagram
adder-block-diagram
array-multiplier-block-diagram
array-multiplier-block-diagram

 The rightmost bit is the MSB bit of partial product. The partial products are now shifted towards the left side on multiplication and they are added to get the final product. This process is repeated until no two partial products exit for addition.

4-by-4-multiplication-1
4-by-4-multiplication-1
logic-diagram-of-4-by-4 - array - multiplier
logic-diagram-of-4-by-4 – array – multiplier

Where a0,a1,a2,a3 and b0,b1,b2,b3 are Multiplicand and Multiplier, summation of all products are partial products.The result of the sum of the partial product is a product.

For a 4×4 Array Multiplier, it needs 16 AND gates, 4 Half Adders(HAs), 8 Full Adders (FAs). Total 12 Adders.

Advantages of 4×4 Array Multiplier

The advantages of array multiplier are,

  • Minimum complexity
  • Easily scalable
  • Easily pipelined
  • Regular shape, easy to place and route

Disadvantages of 4×4 Array Multiplier

The disadvantages of array multiplier are as follows,

  • High power consumption
  • More digital gates resulting in large areas.

Applications of 4×4 Array Multiplier

The applications of array multiplier are listed,

  • Array multiplier is used to perform the arithmetic operation, like filtering, Fourier transform, image coding.
  • High-speed operation.

Thus, this is all about 4×4 array multiplier which is an advanced multiplier based on add and shift principle, the performance can be easily increased using the pipeline technique with simple construction, even though it utilizes more logic gates where it can be implemented using Verilog. Here is a question, “ How many logic gates are required to design 3*3 array multiplier?”.

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