What is an Interrupt : Types and Its Applications

PCs use interrupt requests to handle various hardware functions. Hardware interrupts were first introduced by the UNIVAC 1103 in 1953. The first incidence of interrupt masking was incorporated by IBM 650 in 1954. It is essential to assign different IRQs to different hardware devices to perform various functions. During program execution, devices like keyboards, a mouse requires services of CPU and generates an interrupt to get the attention from CPU and process the requested service. These are known as interrupts. One of the buses of the I/O device is dedicated to serving this purpose is known as Interrupt Service Routine (ISR). These are used in various applications such as for time-sensitive events, data transfer, emphasizing on abnormal events, watchdog timers, traps, etc.

What is an Interrupt?

Definition: It is referred to as an input signal that has the highest priority for hardware or software events that requires immediate processing of an event. During the early days of computing, the processor had to wait for the signal to process any events. The processor should check every hardware and software program to understand if there is any signal to be processed. This method would consume a number of clock cycles and makes the processor busy. Just in case, if any signal was generated, the processor would again take some time to process the event, leading to poor system performance.

A new mechanism was introduced to overcome this complicated process. In this mechanism, hardware or software will send the signal to a processor, rather than a processor checking for any signal from hardware or software. The signal alerts the processor with the highest priority and suspends the current activities by saving its present state and function, and processes the interrupt immediately, this is known as ISR. As it doesn’t last long, the processor restarts normal activities as soon as it is processed.


Types of Interrupt

These are classified into two main types.

Hardware Interrupts

An electronic signal sent from an external device or hardware to communicate with the processor indicating that it requires immediate attention. For example, strokes from a keyboard or an action from a mouse invoke hardware interrupts causing the CPU to read and process it. So it arrives asynchronously and during any point of time while executing an instruction.

Hardware interrupts are classified into two types

  • Maskable Interrupts – Processors have to interrupt mask register that allows enabling and disabling of hardware interrupts. Every signal has a bit placed in the mask register. If this bit is set, an interrupt is enabled & disabled when a bit is not set, or vice versa. Signals that interrupt the processors through these masks are referred to as masked interrupts.
  • Non-maskable Interrupts (NMI) – The NMIs are the highest priority activities that need to be processed immediately and under any situation, such as a timeout signal generated from a watchdog timer.

Software Interrupts

The processor itself requests a software interrupt after executing certain instructions or if particular conditions are met. These can be a specific instruction that triggers an interrupt such as subroutine calls and can be triggered unexpectedly because of program execution errors, known as exceptions or traps.

Triggering Methods

Generally, these signals are designed to trigger using either a logic signal level or a signal edge. These methods are of two types.

Level-triggered Interrupt

In this type, the input module invokes an interrupt if the service level of this is asserted. If an interrupt source continues to be asserted when the firmware interrupt handler handles it, this module regenerates and triggers the handler to invoke again. The level-triggered inputs are not good if remains asserted for a longer duration.

Edge-triggered Interrupt

An edge-triggered interrupt input module invokes an interrupt as soon as it identifies an asserting edge – a falling or a rising edge. The edge becomes noticed when the level of source changes. This type of triggering needs immediate action, irrespective of the activity of the source.


System Implementation

Interrupts shall be applied to hardware as a different component along with control lines, or integrated into memory subsystems. When implementation is performed in hardware, it needs a Programmable Interrupt Controller (PCI) to connect between the CPU’s input pin and the interrupting device. PCI multiplexes various sources of interrupt to the single or double CPU line. When implemented pertaining to the memory controller, the system’s memory address slot is mapped directly with the interrupts.

Shared Interrupt Requests (IRQs)

With edge-triggered interrupt, a pull-up or pull-down resistor is used to drive the interrupt line. This line transmits every pulse produced by each device. If interrupt pulses generated from different devices happen close in time, the CPU must invoke a trailing edge of the pulse to not to miss interrupts, following which CPU ensures to inspect every device for service requests. A well-behaved Industry Standard Architecture (ISA) motherboards with pull-up resistors having sharing IRQ lines must work fine. However, multiple devices sharing IRQ line in older systems with poorly designed programming interface makes it difficult to process interrupts. On the other hand, a new system architecture, such as PCI helps in providing considerable relief to this problem.


A hybrid type of system implementation has a combination of both edge-triggered and level-triggered signaling. The hardware shall look for an edge and also verifies that if a signal is active for a certain period. A hybrid type is commonly used for the non-maskable interrupt (NMI) input, which ensures that false interrupts do not affect the system.


A message-signaled interrupt request for service using device signals by transmitting a message over a communication channel, such as a computer bus. These do not use a physical interrupt line. PCI Express acts as a serial bus and is used exclusively as message-signaled interrupts.


The doorbell interrupt is commonly used as a mechanism by a software system to signal computer hardware to complete the work. Upon mutual agreement between hardware and software, the software places the data in the well-known memory location and rings the doorbell to notify the hardware that the data is ready and waiting to process. Now, the computer hardware device understands the data is valid and processes it accordingly.

Multiprocessor IPI

The multiprocessor systems, an interrupt request from a processor is sent to a different processor through inter-processor interrupts (IPI)

Typical Uses/Applications

These are powerful inputs typically used to

  • Service hardware timers, handle keyboard strokes and mouse actions
  • Respond quickly to time-sensitive or real-time events
  • Data transfer to and from peripheral devices
  • Responds to high-priority tasks such as power-down signals, traps, and watchdog timers
  • Indicates abnormal events of CPU
  • Power-off interrupt foresees the loss of power, enabling orderly shut-down of the system
  • Periodic interrupts to keep track of absolute time


1. Why interrupts are used?

These are used to get the attention of the CPU to perform services requested by either hardware or software.

2. What is NMI?

NMI is a non-maskable interrupt, that cannot be ignored or disabled by the processor

3. What is the function of interrupt acknowledge line?

The processor sends a signal to the devices indicating that it is ready to receive interrupts.

4. Describe hardware interrupt. Give examples

It is generated by an external device or hardware; such as keyboard keys or mouse movement invokes hardware interrupts

5. Describe software interrupt.

It is defined as a special instruction that invokes an interrupt such as subroutine calls. Software interrupts can be triggered unexpectedly because of program execution errors

6. Which interrupt has the highest priority?

  • Non-maskable edge and level triggered
  • TRAP has the highest priority

7. Give some uses of interrupt

  • Respond quickly to time-sensitive or real-time events
  • Data transfer to and from peripheral devices
  • Responds to high-priority tasks such as power-down signals, traps, and watchdog timers
  • Indicates abnormal events of CPU

8. What is a hybrid type of system implementation?

A hybrid type of system implementation has a combination of both edge-triggered and level-triggered signaling. The hardware shall look for an edge and also verifies that if a signal is active for a certain period.

In this article, we have understood the importance of interrupts and how these are used to execute the services requested. We also discussed what are the types,  system implementation, and its uses.

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