Generating PWM Signals With Variable Duty Cycle using FPGA

This article explains the generation of pulse width modulation signals with variable duty cycle on FPGA using VHDL. PWM has a fixed frequency and a variable voltage. This article also discusses the Digital Clock Manager for decreasing the clock frequency by decreasing the skew of the clock signal. A fixed frequency is used to produce the input data that produces the PWM signals using a comparator. Electronic companies design the hardware dedicated to their products with their standards and protocols which makes it challenging for the end users to reconfigure the hardware as per their needs. This requirement for hardware led to the growth of a new segment of customer-configurable field programmable integrated circuits called FPGAs.

Pulse Width Modulation (PWM)

Pulse width modulation is widely used in applications of communication and control systems. Pulse width modulation can be generated using different approaches in control systems. Here, in this article, PWM is generated using Hardware Description Language (VHDL) and implemented on FPGA. Implementation of PWM on FPGA can process the data faster and controller architecture can be optimized for space or speed.

PWM is a technique to provide logic ‘0’ and logic ‘1’ for a controlled period of time. It is a signal source that involves the modulation of its duty cycle to control the amount of power sent to the load. In PWM, the time period of the square wave is kept constant and the time for which the signal remains HIGH is varied.

The PWM generates the pulses on its output in such a way that the average value of HIGHs and LOWs is proportional to the PWM input. The duty cycle of the signal can be varied. A PWM signal is a constant period square wave with varying duty cycle. That is, the frequency of the PWM signal is constant, but the time period of the signal remains high and varies as shown.

PWM Signal
PWM Signal

VHDL

VHDL is a language, used to describe the behaviour of digital circuit designs. VHDL is used by industries and academics for the purpose of simulation of digital circuits. Its design can be simulated and translated in the form which is suitable for implementation in hardware.

PWM Architecture

To produce the input data to generate the PWM using a high-speed N-bit free running counter, whose output is compared with register output and stores desired input duty cycle with the help of comparator. The comparator output is set to 1 when both these values are equal. This comparator output is used to set RS latch. The overflow signal from the counter is used to reset the RS latch. The output of RS latch gives the desired PWM output. This overflow signal is also used to load new N-bit duty cycle in the Register. PWM has a fixed frequency and a variable voltage. This voltage value changes from 0V to 5 V.

PWM signal with variable duty cycle
PWM signal with variable duty cycle

The basic PWM generates the signals, which gives the output of PWM, requires a comparator that compares between two values. The first value represents the square signal generated by the N bit counter and the second value represents the square signal which contains the information about duty cycle. The counter generates the load signal whenever there is an overflow. Once the load signal becomes active, the register loads the new duty cycle value. The load signal is used to reset the latch also. Latch output is a PWM signal. This is varying with the change in duty cycle value.

What is FPGA?

The FPGA is Field Programmable Gate Array. It is a type of device that is widely used in electronic circuits. FPGAs are semiconductor devices which contain programmable logic blocks and interconnection circuits. It can be programmed or reprogrammed to the required functionality after manufacturing.

FPGA
FPGA

Basics of FPGA

When a circuit board is manufactured and if it contains an FPGA as a part of it. This is programmed during the manufacturing process and further can be reprogrammed later to create an update or make necessary changes. This feature of FPGA makes it unique from ASIC. Application Specific Integrated Circuits (ASIC) are custom manufactured for specific design task. In past FPGAs are used to develop low speed, complexity and volume design, but today FPGA will easily push the performance barrier up to 500MHz.

In microcontrollers, the chip is designed for a customer and they have to write the software and compile it to hex file to load onto the microcontroller. This software can be easily replaced as it is stored in flash memory. In FPGAs, there is no processor to run the software and we are the one designing the circuit. We can configure an FPGA as simple as an AND gate or a complex as a multi-core processor. To create a design we write Hardware Description Language (HDL), which is of two types – Verilog and VHDL. Then the HDL is synthesized into a bit file using a BITGEN to configure the FPGA. The FPGA stores the configuration in RAM, that is the configuration is lost when there is no power connectivity. Hence, they must be configured every time power is supplied.

Architecture of FPGA

FPGAs are prefabricated silicon chips that can be programmed electrically to implement digital designs. The first static memory based FPGA called SRAM is used for configuring both logic and interconnection using a stream of configuration bits. Today’s modern EPGA contains approximately 3,30,000 logic blocks and around 1,100 inputs and outputs.

FPGA Architecture
FPGA Architecture

The architecture of FPGA consists of three major components

  • Programmable Logic Blocks, which implement logic functions
  • Programmable Routing (interconnects), which implements functions
  • I/O blocks, which are used to make off-chip connections

Applications of PWM signals

PWM signals are widely used for control applications. Like controlling DC motors, control valves, pumps, hydraulics, etc. Here are the few applications of the PWM signals.

  • Heating systems with slow times 10 to 100Hz or higher.
  • DC electric motors 5 to 10KHz
  • Power supplies or audio amplifiers 20 to 200 KHz.

This article is all about the generation of PWM signals with variable duty cycle using FPGA. Furthermore, for any help on electronic projects or doubts regarding this article, you can contact us by commenting on the comment section given below.

2 Comments

  1. Hello, As I know all the controllers are capable of generating PWM by it’s own, but there are 6 PWM techniques that used to generate pwm signal. So my doubt is which PWM technique does FPGA uses, like sinusoidal technique, space vector, Delta or multiple and much more. Which technique does it use.

    1. Tarun Agarwal says:

      Hi Ranjith
      Digital PWM technique, and thank you so much for your feedback
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