Phase Locked Loop Working with Applications

The phase-locked loop is one of the basic blocks in modern electronic systems. It is generally used in multimedia, communication and in many other applications. There are two different types of PLL’s – linear and nonlinear. The nonlinear is difficult and complicated to design in the real world, but the linear control theory is well modeled in analog PLL’s. The PLL has proved that a linear model is sufficient for most of the electronic applications.


What is a Phase-Locked Loop?

A phase-locked loop consists of a phase detector and a voltage controlled oscillator. The output of the phase detector is the input of the voltage-controlled oscillator (VCO) and the output of the VCO is connected to one of the inputs of a phase detector which is shown below in the basic block diagram. When these two devices are feed to each other the loop forms.

BASIC DIAGRAM OF PHASE LOCKED LOOP
BASIC DIAGRAM OF PHASE LOCKED LOOP

Block Diagram And Working Principle Of PLL

The phase-locked loop consists of a phase detector, a  voltage controlled oscillator and, in between them, a low pass filter is fixed. The input signal ‘Vi’ with an input frequency ‘Fi’ is conceded by a phase detector. Basically the phase detector is a comparator that compares the input frequency fi through the feedback frequency fo. The output of the phase detector is (fi+fo) which is a DC voltage. The out of the phase detector, i.e., DC voltage is input to the low pass filter (LPF); it removes the high-frequency noise and produces a steady DC level, i.e., Fi-Fo. The Vf is also a dynamic characteristic of the PLL.

PLL Block Diagram
PLL Block Diagram

The output of the low pass filter, i.e., DC level is passed on to the VCO. The input signal is directly proportional to the output frequency of the VCO (fo). The input and output frequencies are compared and adjusted through the feedback loop until the output frequency is equal to the input frequency. Hence, the PLL works like free running, capture, and phase lock.

When there is no input voltage applied, then it is said to be a free-running stage. As soon as the input frequency applied to the VOC changes and produces an output frequency for comparison, it is called a capture stage. The below figure shows the block diagram of the PLL.

Phase-Locked Loop Detector

The phase-locked loop detector compares the input frequency and the output frequency of the VCO to produces a DC voltage which is directly proportional to the phase distinction of the two frequencies. The analog and digital signals are used in the phase-locked loop. Most of the monolithic PLL integrated circuits use an analog phase detector and the majority of phase detectors are from the digital type. A double balanced mixture circuit is used commonly in analog phase detectors. Some common phase detectors are given below:

Exclusive OR Phase Detector

An exclusive OR phase detector is CMOS IC 4070 type. The input and output frequencies are applied to the EX OR phase detector. To obtain the output high at least one input should be low and the other conditions of output are low which is shown in the below truth table. Let us consider the waveform, the input and output frequencies, i.e. fi and fo have a phase difference of 0 degrees. Then the DC output voltage of the comparator will be a function of the phase difference between the two inputs.

                 fi

fo

Vdc

low

low

 low

low

   high

high

high

Low

high

High

High

low

The functions of the phase difference between the fi and fo is as shown in the graph of DC output voltage. If the phase detector is 180 degrees, then the output voltage is maximum. If both the input and output frequencies are square wave these type of the phase detectors are used.

Exclusive OR Phase Detector
Exclusive OR Phase Detector

Edge Trigger Phase Detector

An edge trigger phase detector is used when the input and output frequencies are in pulse waveform, which is less than 50% duty cycle. The R-S flip flop is used for the phase detectors, which is shown in the below figure. To from R-S flip flop, the two NOR gates are cross-coupled. The output of the phase detector can change its logic state by triggering the R-S flip flop. The positive edge of the input and output frequencies can change the output of the phase detector.

Edge Trigger Phase Detector
Edge Trigger Phase Detector

Monolithic Phase Detector

A monolithic phase detector is a CMOS type, i.e., IC 4044. It is highly compensated from the harmonic sensitivity and the duty cycle problems are abandoned as the circuit can respond only to the transition of the input signal. In critical applications, it is the most fevered phase detector. The independent variations of the amplitude are free from the phase error, output error voltage and duty cycle of the input waveforms.

Applications of Phase-Locked Loop

  • FM demodulation networks for FM operations
  • It is used in motor speed controls and tracking filters.
  • It is used in frequency shifting decodes for demodulation carrier frequencies.
  • It is used in time to digital converters.
  • It is used for Jitter reduction, skew suppression, clock recovery.

This is all about the phase-locked loop’s working and operational principle and its applications. We hope that the information given in the article is helpful to you to know something about the project and understand it. Furthermore, if you have any queries regarding this article and on electrical and electronic projects you can comment in the below section. Here is a question for you, what is the best way to simulate the PLL for stability?

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