Blackfin Processor : Architecture, Features & Its Applications

Blackfin processor was designed, developed, & marketed through Analog Devices & Intel as Micro Signal Architecture (MSA). The architecture of this processor was announced in December 2000 & demonstrated first at the ESC (Embedded Systems Conference) in June 2001. This Blackfin processor was mainly designed to reach the power constraints & computational demands of present embedded audio, video & communications applications. This article discusses an overview of a Blackfin processor – architecture and its applications.

What is Blackfin Processor?

The Blackfin processor is a 16 or 32-bit microprocessor that includes an inbuilt, fixed-point DSP functionality supplied through 16-bit MACs (multiply–accumulates). These processors were mainly designed for a combined low-power processor architecture that can run OS while handling difficult numeric tasks simultaneously like real-time H.264 video encoding.

This processor combines a 32-bit RISC & dual 16-bit MAC signal processing functionality by easily using attributes that are found within general-purpose microcontrollers. So this processing attributes combination allows Blackfin Processors to achieve similarly well in both control processing & signal processing applications. This ability simplifies greatly both the implementation tasks of hardware & software design.

Blackfin Processor
Blackfin Processor

Blackfin Features:

  • This processor has single instruction set architecture including processing performance that simply meets/beats the product range of digital signal processor or DSP to provide better cost, power & memory efficiency.
  • This 16 or 32-bit architecture processor simply allows upcoming embedded applications.
    Multimedia, signal & control processing within a single core.
  • It increases the productivity of developers.
  • It has tunable performance throughout dynamic power management for power consumption or signal processing.
  • It is adopted very quickly into various designs which are simply supported by several toolchains as well as operating systems.
  • It requires minimum optimization because of the development environment of powerful software coupled with core performance.
  • Blackfin processor supports industry-leading development tools.
  • The performance of this processor & half the power of competing DSPs allows advanced specifications & new applications.

Blackfin Processor Architecture

The Blackfin processor provides both the functionalities of a micro-controller unit & digital signal processing within a single processor by allowing flexibility. So this processor includes a SIMD (single instruction multiple data) processor including some features like variable-length RISC instructions, watchdog timer, on-chip PLL, memory management unit, real-time clock, serial ports with 100 Mbps, UART controllers & SPI ports.

The MMU supports multiple DMA channels to transfer data between peripherals & FLASH, SDRAM, and SRAM memory subsystems. It also supports data caches & configurable on-chip instruction. The Blackfin processor is a simple hardware which supports 8, 16, and 32-bit arithmetic operations.

The Blackfin architecture is mainly based on the architecture of micro signal and this was jointly developed by ADI (Analog Devices) & Intel, which includes a 32-bit RISC instruction set and 8-bit video instruction set with dual 16-bit multiply-accumulate (MAC) units.

Blackfin Processor Architecture
                      Blackfin Processor Architecture

Analog devices are capable of achieving a balance between the DSP & MCU requirements through the instruction set architecture of Blackfin. Generally, the Blackfin processor is coupled with the powerful VisualDSP++ software development tools but now by using C or C++, it is possible to produce highly efficient code very easily than before. For real-time requirements, operating system support becomes critical, so the Blackfin supports a no. of operating systems & memory protection. Blackfin processor comes in both single-core like BF533, BF535 & BF537, and dual-core like BF561 models.

The Blackfin processor architecture includes different on-chip peripherals like a PPI (Parallel Peripheral Interface), SPORTS (Serial Ports), SPI (Serial Peripheral Interface), UART (Universal Asynchronous Receiver Transmitter), General-purpose timers, RTC (Real-Time Clock), Watchdog timer, General-purpose I/O (programmable flags), Controller Area Network (CAN) Interface, Ethernet MAC, Peripheral DMAs -12, Memory to Memory DMAs -2 including Handshake DMA, TWI (Two-Wire Interface) Controller, a Debug or JTAG Interface & Event Handler with 32 Interrupt Inputs. All these peripherals in the architecture are simply connected through different high-bandwidth buses to the core. So, a description of some of these peripherals is given below.

PPI or Parallel Peripheral Interface

The Blackfin processor simply provides a PPI which is also known as Parallel Peripheral Interface. This interface is directly connected to parallel analog to digital & digital to analog converters, video encoders, and decoders & also to other general-purpose peripherals.

This interface includes a dedicated input CLK pin, three frame synchronization pins & 16 data pins. Here, the input CLK pin simply supports parallel data rates equal to half of the system CLK speed. Three different ITU-R 656 modes support only Active Video, Vertical Blanking & complete field.

The PPI’s general-purpose modes are given to suit a wide different transmission & data capture applications. So these modes are separated into main categories Data Receive through Internally Generated Frame Syncs, Data Transmit through Internally Generated Frame Syncs, Data Transmit through Externally Generated Frame Syncs and Data Received through Externally Generated Frame Syncs.


The Blackfin processor includes two dual-channel synchronous serial ports SPORT0 & SPORT1 used for serial & multiprocessor communications. So these are high-speed and synchronous serial port that supports I²S, TDM & various other configurable framing modes for connecting DACs, ADCs, FPGAs & other processors.

SPI or Serial Peripheral Interface Port

The Blackfin processor includes an SPI port that allows the processor to converse with various SPI-compatible devices. This interface simply utilizes three pins to transmit data, data pins-2 & one CLK pin. The select input and output pins of the SPI port simply give a full-duplex SSI (synchronous serial interface) that supports both master & slave modes and also multi-master environments. The baud rate of this SPI port & clock phase or polarities is programmable. This port has an incorporated DMA controller that supports either transmitting/receive data streams.


Blackfin processor has 9 programmable timer units. These timers generate interrupts to the processor core for providing periodic events intended for synchronization to the clock of the processor or to an external signals count.


The term UART stands for “universal asynchronous receiver transmitter” port. The Blackfin processor provides 2-half-duplex UART ports, which are completely well-suited through PC standard UARTs. These ports simply provide a basic UART interface to other hosts or peripherals to provide DMA-supported, half-duplex, asynchronous serial data transfers.

The UART ports include 5 to 8 data bits and 1 or 2 stop bits and they support 2 modes of operation like Programmed I/O & DMA. In the first mode, the processor transmits or receives data through reading/writing I/O-mapped registers, wherever the data is buffered twice on both transmit & receive. In the second mode, the DMA controller transmits & receives data and decreases the number of interrupts necessary to transmit data from & to the memory.

RTC or Real-Time Clock

The real-time clock of the blackfin processor simply provides different features like a stopwatch, current time & alarm. So, the real-time clock is clocked with a 32.768 kHz crystal external to the Blackfin processor. The RTC within the processor has power supply pins, which can stay powered up & clocked even once the rest of the Blackfin processor is in a low-power condition. The real-time clock provides a number of programmable interrupt options. The 32.768 kHz input CLK frequency is separated down to a 1 Hz signal through a Prescaler. Similar to the other devices, the real-time clock can wake up the Blackfin processor from Deep Sleep mode/ Sleep mode.

Watchdog Timer

The Blackfin processor has a 32-bit watchdog timer, used to execute a software watchdog function. So the programmer initializes the timer’s count value that allows the proper interrupt, and then allows the timer. After that, the software must reload the counter before it counts from the programmed value to ‘0’.

GPIO or General-Purpose I/O

A GPIO is a digital signal pin that is used as an input, output, or both & is controlled through software. The Blackfin processor includes GPIO (general-purpose I/O) pins, 48-bi-directional across 3-separate GPIO modules like PORTFIO, PORTHIO & PORTGIO connected with Port G, Port H & Port F respectively. Every general-purpose port pin is controlled individually through manipulation of the status, port control & interrupt registers like GPIO DCR, GPIO CSR, GPIO IMR, and GPIO ISR.

Ethernet MAC

The Ethernet MAC peripheral in the Blackfin processor provides 10 to 100 Mb/s in between an MII (Media Independent Interface) & the peripheral subsystem of Blackfin. The MAC simply works in both Full-Duplex & Half-Duplex modes. The media access controller is internally clocked from the processor’s CLKIN pin.


The memory of Blackfin Processor architecture simply provides for both Level 1 & Level 2 memory blocks in the implementation of the device. The memory of L1 like data & instruction memory is simply connected to the processor core directly, runs at complete system CLK speed & provides maximum system performance for critical time algorithm segments. The L2 memory like SRAM memory is larger that provides a little reduced performance, however, it is still faster as compared to off-chip memory.

The structure of L1 memory is implemented to provide the performance required for processing signals while offering programs in microcontrollers. This is achieved by simply permitting the memory L1 to be arranged as SRAM, cache, otherwise a combination of both.

By supporting the cache and SRAM programming models, the designers of the system assign critical real-time signal processing data sets that need low latency & high bandwidth into SRAM, while storing real-time control or OS tasks within the cache memory.

Boot Modes

The Blackfin processor includes six mechanisms for internal L1 instruction memory loading automatically after a reset. So the different boot modes mainly include; Boot mode from 8-bit &16-bit outside flash memory, serial SPI memory. The SPI host device, UART, serial TWI memory, TWI Host and perform from 16-bit external memory, bypassing boot series. For each of the first 6 boot modes, first a 10-byte header is read from an exterior memory device. So, the header indicates the no. of bytes to be transmitted & the memory destination address. Several memory blocks may be loaded through any boot series. When all blocks are simply loaded, then program execution starts from the beginning of L1 instruction SRAM.

Addressing Modes

The addressing modes of the blackfin processor simply determine how an individual access memory and addressing is to specify a location. The addressing modes used in the blackfin processor are indirect addressing, autoincrement/decrement, post modify, indexed with immediate offset, circular buffer, and Bit reverse.

Indirect Addressing

In this mode, the address field within the instruction includes the location of memory or register wherever the efficient operand’s address is present. This addressing is classified into two categories like Register Indirect & Memory Indirect.

For Example LOAD R1, @300

In the above instruction, the effective address is simply stored at memory location 300.

Autoincrement/Decrement Addressing

Auto-increment addressing simply updates the Pointer as well as Index registers after the right of entry. The amount of increment mainly depends on the size of the word size. 32-bit word access can result within the Pointer update with ‘4’. A 16-bit word access updates the Pointer with ‘2’ & an 8-bit word access updates the Pointer with ‘1’. The read operations of both 8-bit & 16-bit may indicate either zero-extend/sign-extend the contents into the target register. Pointer registers are mainly used for 8, 16, & 32-bit accesses whereas Index registers are used for only 16 & 32bit accesses

For example: R0 = W [ P1++ ] (Z) ;

In the above instruction, a 16-bit word loads into a 32-bit destination register from a pointed address through the Pointer register ‘P1’. After that, the Pointer is increased with 2 & the word is ‘0’ extended to fill the 32-bit destination register.

Similarly, auto-decrement works by decreasing the address after the right of entry.

For example: R0 = [ I2– ] ;

In the above instruction, a 32-bit value loads into the destination register & reduces the Index register by 4.

Post-modify Addressing

This type of addressing simply uses the value within the Index/Pointer registers like the efficient address. After that, it modifies it with register contents. Index registers are simply changed with modified registers whereas pointer registers are changed by other pointer registers. Like destination registers, Post-modify type addressing does not support the Pointer registers.

For example: R3 = [ P1++P2 ] ;

In the above instruction, a 32-bit value is loaded into the ‘R3’ register and found within the location of memory pointed by the ‘P1’ register. After that, the value within the ‘P2’ register is added to the value within the P1 register.

Indexed with Immediate Offset

Indexed addressing simply permits programs to get values from data tables. The Pointer register is changed by the immediate field, after that it is used as the effective address. So the Pointer register value is not updated.

For instance, if P1 = 0x13, then [P1 + 0x11] would efficiently be equivalent to [0x24], which is associated with all accesses.

Bit Reverse Addressing

For some algorithms, programs require bit-reversed carry addressing to obtain results in sequential order, particularly for FFT (Fast Fourier Transform) calculations. For satisfying these algorithm’s requirements, the bit-reversed addressing feature of Data Address Generators repeatedly allows subdividing data series & storing this data within bit-reversed order.

Circular Buffer Addressing

The Blackfin processor provides a feature like optional circular addressing that simply increases an Index Register by a predefined range of addresses, after that it resets automatically the index registers to repeat that range. So this feature enhances the performance of the input/output loop by simply removing the address index pointer every time.

Circular buffer addressing is very useful when repeatedly loading or storing a string of fixed-sized data blocks. The contents of the circular buffer must meet these conditions:

  • The circular buffer maximum length should be an unsigned number with a magnitude below 231.
  • The modifier’s magnitude must be below the circular buffer’s length.
  • The first location of the pointer ‘I’ must be in the circular buffer that is defined by the length ‘L’ & base ‘B’.

If any of the above conditions are not satisfied, then the behavior of the processor is not specified.

Register File of Blackfin Processor

The Blackfin processor includes three definitive register files like; Data Register File, Pointer Register File & DAG register.

  • The data register file collects operands using the data buses used for the computational units & stores computational results.
  • The pointer register file includes pointers used for addressing operations.
  • The DAG registers manage zero-overhead circular buffers used for DSP operations.

Blackfin processor provides first-class power management & performance. These are designed with a low voltage & low power design methodology which are capable of varying both the voltage & operation frequency to reduce overall power utilization significantly. So this can result in a considerable decrease in power utilization, as compared with just changing the operation frequency. So this simply allows battery life longer for handy appliances.

Blackfin processor supports different external memories like DDR-SDRAM, SDRAM, NAND flash, SRAM & NOR flash. Some Blackfin processors also comprise mass-storage interfaces like SD/SDIO & ATAPI. They can also support 100 megabytes of memory within the space of external memory.


The advantages of the Blackfin processor include the following.

  • Blackfin Processors provide basic benefits to the designer of the system.
  • Blackfin processor offers software flexibility as well as scalability for convergent applications like audio, video, voice & image processing in multiformat, real-time security, control processing, and multimode baseband packet processing
  • The efficient control processing capacity & high-performance signal processing allows different new markets & applications.
  • DPM (Dynamic Power Management) allows the system designer to particularly modify the power consumption of the device to the requirements of the end system.
  • These processors reduce development time & costs greatly.


The applications of the Blackfin processor include the following.

  • Blackfin processors are ideal for many applications like ADAS (automotive advanced driver assistance systems), surveillance or security systems & industrial machine vision.
  • Blackfin applications include servo motor control systems, automotive electronics, monitoring systems & multimedia consumer devices.
  • These processors simply perform microcontroller & signal processing functions.
  • These are used for audio, process control, automotive, testing, measurement, etc.
  • The Blackfin Processors are used in signal processing applications like broadband wireless, mobile communications & audio or video-capable Internet appliances.
  • Blackfin is used in convergent applications like networked & streaming media, digital home entertainment, automotive telematics, infotainment, mobile TV, digital radio, etc.
  • Blackfin processor is an embedded processor that has the power efficiency & highest performance used in applications wherever multi-format voice, audio, video, multi-mode baseband, image processing, packet processing, real-time security & control processing are significant.

Thus, this is an overview of Blackfin Processor – architecture, advantages & its applications. This processor performs signal processing & microcontroller functions. Here is a question for you, what is a processor?